Upset and damage effects and mechanisms of CMOS NAND gate caused by electromagnetic pulses
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摘要: 利用Sentaurus-TCAD建立了CMOS与非门电路的二维电热模型，仿真研究了在电磁脉冲注入下，CMOS与非门电路产生的扰乱和损伤效应及其机理。结果表明，在EMP注入下，电路输出电压、内部的峰值温度呈周期性的“下降-上升”，当注入功率较大时，EMP撤销后输出电压停留在异常值，PMOS源极电流增加，温度不断上升，最终烧毁在PMOS源极，这是因为器件内部产生了闩锁效应。随着脉宽的增加, 损伤功率阈值减小而损伤能量阈值增大，通过数据拟合得到脉宽与损伤功率阈值和损伤能量阈值的关系。该结果可对EMP损伤效应进行评估并对器件级EMP抗毁伤加固设计具有指导作用。Abstract: A two-dimensional electrothermal model of CMOS NAND gate is established by Sentaurus-TCAD, and the upset and damage effects and mechanisms of CMOS NAND gate are studied with the injection of electromagnetic pulse. The results show that under EMP injection, the output voltage and internal peak temperature of the device show a periodic “decline-rise”. After the EMP is removed, the output voltage stays at an abnormal value, the PMOS source current increases, the temperature keeps rising, and finally burn-out occurs in the PMOS source, due to the latch-up effect inside the device. As the pulse-width increases, the damage power threshold decreases and the damage energy threshold increases. The relationship between the pulse-width τ, the damage power threshold P and the damage energy threshold E is obtained by data fitting. The results can be used to evaluate the damage effect of EMP and provide guidance for device-level EMP anti-damage reinforcement design.
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Key words:
- CMOS NAND /
- electromagnetic pulse /
- upset effect /
- damage effect /
- pulse-width effect
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Figure 6. Distribution of current density when a 1 GHz, 9.5 dBm microwave signal is injected
Figure 7. Distribution of internal temperature when a 1 GHz, 9.5 dBm microwave signal is injected
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