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芯片-系统电磁脉冲耦合的高性能全波电磁模拟

王卫杰 赵振国 胡少亮 李瀚宇 周海京

王卫杰, 赵振国, 胡少亮, 等. 芯片-系统电磁脉冲耦合的高性能全波电磁模拟[J]. 强激光与粒子束, 2021, 33: 123015. doi: 10.11884/HPLPB202133.210359
引用本文: 王卫杰, 赵振国, 胡少亮, 等. 芯片-系统电磁脉冲耦合的高性能全波电磁模拟[J]. 强激光与粒子束, 2021, 33: 123015. doi: 10.11884/HPLPB202133.210359
Wang Weijie, Zhao Zhenguo, Hu Shaoliang, et al. High-performance full-wave computational electromagnetic analysis for chip-system under electromagnetic pulse[J]. High Power Laser and Particle Beams, 2021, 33: 123015. doi: 10.11884/HPLPB202133.210359
Citation: Wang Weijie, Zhao Zhenguo, Hu Shaoliang, et al. High-performance full-wave computational electromagnetic analysis for chip-system under electromagnetic pulse[J]. High Power Laser and Particle Beams, 2021, 33: 123015. doi: 10.11884/HPLPB202133.210359

芯片-系统电磁脉冲耦合的高性能全波电磁模拟

doi: 10.11884/HPLPB202133.210359
基金项目: 国家自然科学基金项目(12001053);中物院创新发展基金项目(CX2019034);国防基础科研计划资助课题(TZ2018002)
详细信息
    作者简介:

    王卫杰,wang_weijie@iapcm.ac.cn

    通讯作者:

    周海京,zhou_haijing@iapcm.ac.cn

  • 中图分类号: TN248.6

High-performance full-wave computational electromagnetic analysis for chip-system under electromagnetic pulse

  • 摘要: 目的是研究高性能的电磁场仿真软件,对真实的芯片-系统电磁脉冲耦合过程进行高分辨率、高置信度的电磁仿真。研究重点是针对多尺度问题,突破算法的并行计算瓶颈。基于自主软件平台快速研发出仿真软件,在高性能计算平台上完成对真实复杂问题的全波电磁仿真。通过对某真实机箱内部芯片的电磁脉冲耦合仿真分析,验证了本文提出的算法的高性能、高效率的特性。
  • 图  1  并行编程框架JAUMIN架构图

    Figure  1.  Software architecture of parallel programming framework JAUMIN

    图  2  软件平台架构框图

    Figure  2.  Software platform

    图  3  平面波照射介质体内部电场变化与商业软件对比结果

    Figure  3.  Comparison of calculated results with commercial software of electric field variation of a dielectric box under plane wave

    图  4  偶极子天线S参数计算结果与商业软件对比

    Figure  4.  S parameter calculation compared with commercial software

    图  5  偶极子天线示意图

    Figure  5.  Geometrical illustration of a dipole antenna

    图  6  芯片-系统示意图

    Figure  6.  Schematic illustration of chip-system model

    图  7  输入电磁脉冲波形

    Figure  7.  Waveform of input pulse

    图  8  有机箱屏蔽不同时刻机箱与芯片电磁脉冲耦合的结果

    Figure  8.  Coupling effect of computer case and chip at different simulation time

    图  9  无机箱屏蔽不同时刻芯片电磁脉冲耦合的结果

    Figure  9.  Coupling effect of chip without computer case at different simulation time

    图  10  待监测系统级封装芯片端口分布示意图

    Figure  10.  Lumped port distribution of system-in-package

    图  11  不同端口监测到的端口电压频域分布

    Figure  11.  Port voltage of the listed 20 ports in frequency domain

    表  1  芯片材料信息

    Table  1.   Material properties of Chip

    relative permittivityrelative permeabilitybulk conductivitydielectric loss tangent
    Al2_O3_ceramic 9.8 1.0 0.0 0.0
    aluminum 1 1 3.8×107
    copper 1.0 1.0 5.8×107
    gallium_arsenide 12.9 1.0 1.0 0.0
    gold 1.0 1.0 4.1×107
    rogers RO4350 (tm) 3.66 1.0 0.0 0.004
    silicon 11.9 1.0 0.0 0.0
    下载: 导出CSV

    表  2  并行计算参数

    Table  2.   Parallel computing information

    number of gridsnumber of CPU corescenter frequency/GHztime step/stotal simulation time/s
    10 000 000 120 1.0 2.0×10−11 10.0×10−8
    下载: 导出CSV

    表  3  不同时刻耦合电场的最大值

    Table  3.   Maximum value of electric fieldat different time

    time/ns with computer box shielding/(V·m−1 without computer box shielding/(V·m−1
    0.4 0.1860 0.4674
    5.2 9.014 54.68
    10 39.36 917.8
    下载: 导出CSV
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出版历程
  • 收稿日期:  2021-08-19
  • 修回日期:  2021-11-18
  • 网络出版日期:  2021-12-07
  • 刊出日期:  2021-12-15

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