Design of IP core for DC micromotor controller based on FPGA

In order to achieve the phase control of array antenna efficiently, miniaturization, high-speed and parallel control, according to the Nios Ⅱs Avalon bus specification, the paper introduces the design of an IP core for DC-Micromotor controller based on FPGA, and the completion of simulation and experimental verification using Verilog hardware description language. In order to meet the high-speed and parallel control requirements, the controller uses a method of finite-state machine, achieving hardware control functions by several modules. Based on DC micromotor driving characteristics, is uses a PID algorithm, sectional control and start-stop monitoring and other control strategies. Experiments show that the position control system has the characteristics of fast response, high precision, high reliability, small size, and portability; it independently controls multiple axis DC micromotor, and has good control performance, which can meet the requirements of fast and accurate phase control of the antenna.