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高延时分辨低抖动同步时序信号产生技术

王深圳 王超 苏东 党钊 张雄军 陈文棋 陈骥

王深圳, 王超, 苏东, 等. 高延时分辨低抖动同步时序信号产生技术[J]. 强激光与粒子束, 2023, 35: 082002. doi: 10.11884/HPLPB202335.220294
引用本文: 王深圳, 王超, 苏东, 等. 高延时分辨低抖动同步时序信号产生技术[J]. 强激光与粒子束, 2023, 35: 082002. doi: 10.11884/HPLPB202335.220294
Wang Shenzhen, Wang Chao, Su Dong, et al. Generation technology of synchronous trigger signals with low time jitter and high delay resolution[J]. High Power Laser and Particle Beams, 2023, 35: 082002. doi: 10.11884/HPLPB202335.220294
Citation: Wang Shenzhen, Wang Chao, Su Dong, et al. Generation technology of synchronous trigger signals with low time jitter and high delay resolution[J]. High Power Laser and Particle Beams, 2023, 35: 082002. doi: 10.11884/HPLPB202335.220294

高延时分辨低抖动同步时序信号产生技术

doi: 10.11884/HPLPB202335.220294
基金项目: 国家自然科学基金项目(12004352)
详细信息
    作者简介:

    王深圳,szwang@cqu.edu.cn

    通讯作者:

    党 钊,qingzhaodangma@caep.cn

  • 中图分类号: TN492

Generation technology of synchronous trigger signals with low time jitter and high delay resolution

  • 摘要: 针对大型激光装置中广空间分布的甚多路高精度(一是长时间时间抖动小于5 ps,二是时间延迟微步进分辨率小于15 ps)同步触发信号的需求,设计了一种“数据流编解码光传输+高速串行收发器粗延时+宽带微带线微步进延时”的同步时序产生方案。通过数据流编解码光传输架构实现了广空间范围内时序的对齐;高速串行收发器粗延时和微带线微步进延时技术解决了同步触发信号低时间抖动和高延迟分辨的问题。通过对系统的时序逻辑和电路板的关键线路进行仿真,完成了整个系统的设计与研制,并开展了实验测试。测试结果表明:该系统可以实现广空间范围内的同步时序信号产生,同步触发信号的时间抖动精度优于3.76 ps(均方根值,8 h),39.6 ps(峰峰值,8 h),时间延迟分辨率优于15 ps;若应用于小空间范围,同步触发信号的时间精度可优于1.27 ps(均方根值,8 h),12.4 ps(峰峰值,8 h)。
  • 图  1  高延时分辨低抖动同步时序信号产生系统框图

    Figure  1.  Framework of the synchronizing system with high resolution and low jitter

    图  2  基准时钟与触发启动信号的编解码过程图

    Figure  2.  Encoding and decoding of the reference clock and delayed start signal

    图  3  高速串行收发器粗延时的原理图

    Figure  3.  Principle of coarse delay by using transceiver

    图  4  高速串行收发器工作模式配置图

    Figure  4.  Transceiver configured in Basic (PMA Direct)

    图  5  微带线微步进延迟线原理图

    Figure  5.  Principle of fine delay by using stripline delay line

    图  6  Transceiver收发器实现同步信号的粗延时的波形图

    Figure  6.  Wave of the transceiver implementing the coarse delay of the synchronization signal

    图  7  基准时钟与延时起点信息的编解码时序逻辑仿真图

    Figure  7.  Codec timing logic simulation of the reference clock and delayed start signal

    图  8  具备粗延时的同步信号波形数据的产生

    Figure  8.  Generation of the waveform data for synchronous signals with coarse delay

    图  9  电路板关键线路的仿真

    Figure  9.  Simulation of key circuits on the board

    图  10  实验测试系统框图

    Figure  10.  Framework of experimental test system

    图  11  同步信号时间抖动测试结果

    Figure  11.  Timing jitter result of synchronous signals

    表  1  延时设置误差测试结果

    Table  1.   Results of delay setting error

    No.delay on the
    CH1/ns
    delay on the
    CH2/ns
    delay between the two channels
    in the oscilloscope/ns
    theoretical
    value/ns
    error between the theoretical
    value and measured/ps
    1 1 1 −0.027 −0.027(intrinsic delay) 0
    2 1 10 −9.031 −9.027 4
    3 1 50 −49.036 −49.027 9
    4 1 100 −99.034 −99.027 7
    5 1 300 −299.035 −299.027 8
    6 1 800 −799.036 −799.027 9
    7 1 1000 −990.033 −999.027 6
    8 1 2000 −1999.039 −1999.027 12
    9 1 5000 −4999.053 −4999.027 26
    10 1 10000 −9999.063 −9999.027 36
    11 1 20000 −19999.083 −4999.027 56
    下载: 导出CSV

    表  2  延时分辨率测试结果

    Table  2.   Results of delay resolution

    No.delay on the
    CH1/ns
    delay on the
    CH2/ns
    delay between the two channels
    in the oscilloscope/ps
    theoretical
    value/ps
    error between the theoretical
    value and measured/ps
    1 1 1.00 −27 −27(intrinsic delay) 0
    2 1 1.01 −40 −37 3.0
    3 1 1.02 −47 −47 0
    4 1 1.03 −59 −57 2.0
    5 1 1.04 −66.7 −67 −0.3
    6 1 1.05 −81.6 −77 4.6
    7 1 1.08 −107.8 −107 0.8
    8 1 1.10 −127.5 −127 0.5
    9 1 1.15 −179.8 −177 2.8
    10 1 1.20 −225.7 −227 −1.3
    11 1 1.25 −279 −277 2.0
    12 1 1.30 −331.5 −327 4.5
    13 1 1.31 −341.7 −337 4.7
    下载: 导出CSV
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出版历程
  • 收稿日期:  2022-08-20
  • 修回日期:  2023-05-27
  • 录用日期:  2023-05-23
  • 网络出版日期:  2023-06-03
  • 刊出日期:  2023-08-15

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