Performance research and parameter optimization of 15 nm Bulk nFinFET device

Hou Tianhao; Fan Jieqing; Zhao Qiang; Zhang Fang; Hao Jianhong; Dong Zhiwei

doi:10.11884/HPLPB202436.230169

Volume 36 Issue 3

Feb. 2024

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Hou Tianhao, Fan Jieqing, Zhao Qiang, et al. Performance research and parameter optimization of 15 nm Bulk nFinFET device[J]. High Power Laser and Particle Beams, 2024, 36: 031003. doi: 10.11884/HPLPB202436.230169

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Hou Tianhao, Fan Jieqing, Zhao Qiang, et al. Performance research and parameter optimization of 15 nm Bulk nFinFET device[J]. High Power Laser and Particle Beams, 2024, 36: 031003. doi: 10.11884/HPLPB202436.230169

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Performance research and parameter optimization of 15 nm Bulk nFinFET device

doi: 10.11884/HPLPB202436.230169

1.
School of Electrical and Electronic Engineering, North China Electric Power University, Beijing 102206, China
2.
Institute of Applied Physics and Computational Mathematics, CAEP, Beijing 100094, China

Received Date: 2023-06-05
Accepted Date: 2023-12-15
Rev Recd Date: 2023-12-15

Available Online: 2024-01-04

Publish Date: 2024-02-29

Abstract

Abstract

Due to the growing severity of the short-channel effect in semiconductor devices, a new type of device, the FinField-Effect Transistor (FinFET), has been proposed, developed and applied. This paper aims to establish a 15 nm n-type Bulk FinFET device model to investigate the impact of basic structural parameters, device temperature, and gate material on the performance of Bulk FinFETs. Simulations are conducted to analyze the effect of different gate lengths, fin widths, fin heights, channel doping concentration, device operating temperature, and gate materials on the performance of FinFETs. The results show that increasing the gate length, decreasing the fin width, and increasing the fin height can effectively suppress the short-channel effect. Moreover, the channel doping concentration below 1×10¹⁷ cm⁻³ has little effect on the device characteristics, while high doping concentration causes device failure. Additionally, increasing the operating temperature leads to device performance degradation. Finally, using high K dielectric material as the gate material is found to enhance device performance compared to using conventional SiO₂ material.
- Bulk FinFET,
- short channel effect,
- device performance,
- parameter optimization,
- gate material

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References(19)

References

[1]	缪晔辰. 鳍式场效应晶体管的有利特性及目前的研究方向[J]. 科技视界, 2021(15): 98-99 Miao Yechen. The advantages of fin FET and the current research direction[J]. Science & Technology Vision, 2021(15): 98-99)
[2]	Hisamoto D, Lee W C, Kedzierski J, et al. FinFET—a self-aligned double-gate MOSFET scalable to 20 nm[J]. IEEE Transactions on Electron Devices, 2000, 47(12): 2320-2325. doi: 10.1109/16.887014
[3]	马伟彬. FinFET器件技术简介[J]. 科技展望, 2016, 26(16):104-105 Ma Weibin. Introduction to FinFET device technology[J]. Science and Technology, 2016, 26(16): 104-105
[4]	单婵. 无结FinFET器件三维仿真研究[D]. 哈尔滨: 哈尔滨工程大学, 2014: 26-30 Shan Chan. Three dimensional simulation of junctionless FinFET[D]. Harbin: Harbin Engineering University, 2014: 26-30
[5]	Gaynor B D, Hassoun S. Fin shape impact on FinFET leakage with application to multithreshold and ultralow-leakage FinFET design[J]. IEEE Transactions on Electron Devices, 2014, 61(8): 2738-2744. doi: 10.1109/TED.2014.2331190
[6]	Falk H. Prolog to: leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits[J]. Proceedings of the IEEE, 2003, 91(2): 303-304. doi: 10.1109/JPROC.2003.808154
[7]	李亚鹏, 李颖峰, 贺志荣, 等. 金属与半导体肖特基接触势垒模型及其载流子传输机制的研究进展[J]. 材料导报, 2017, 31(3):57-62 Li Yapeng, Li Yingfeng, He Zhirong, et al. Progress of Schottky contact model and carrier transport mechanism at the interface between metal and semiconductor[J]. Materials Reports, 2017, 31(3): 57-62
[8]	Al Imam S. Simulation of a 2D pn junction in silicon thin film incorporating quantum transport for carriers[D]. Montreal: Concordia University, 2006.
[9]	Appel J. Electron-electron scattering and transport phenomena in nonpolar semiconductors[J]. Physical Review, 1961, 122(6): 1760-1772. doi: 10.1103/PhysRev.122.1760
[10]	Chen K J, Häberlen O, Lidow A, et al. GaN-on-Si power technology: devices and applications[J]. IEEE Transactions on Electron Devices, 2017, 64(3): 779-795. doi: 10.1109/TED.2017.2657579
[11]	Boukortt N E I, Lenka T R, Patanè S, et al. Effects of varying the fin width, fin height, gate dielectric material, and gate length on the DC and RF performance of a 14-nm SOI FinFET structure[J]. Electronics, 2022, 11: 91.
[12]	胡从振. SOI FinFET辐射效应研究[D]. 西安: 西安电子科技大学, 2019: 42 Hu Congzhen. Study on reliability of irradiation effect of SOI FinFET[D]. Xi’an: Xidian University, 2019: 42
[13]	吕英波. 声子散射对载流子输运特性的影响[J]. 大学物理, 2017, 36(12):10-14 Lv Yingbo. Effect of phonon scattering on carrier transport characteristics[J]. College Physics, 2017, 36(12): 10-14
[14]	Taur Y, Ning T H. Fundamentals of modern VLSI devices[M]. New York: Cambridge University Press, 1998.
[15]	Choi J H, Murthy J, Roy K. The effect of process variation on device temperature in FinFET circuits[C]. 2007 IEEE/ACM International Conference on Computer-Aided Design. 2007: 747-751.
[16]	Venkateswarlu S, Sudarsanan A, Singh S G, et al. Ambient temperature-induced device self-heating effects on multi-Fin Si n-FinFET performance[J]. IEEE Transactions on Electron Devices, 2018, 65(7): 2721-2728. doi: 10.1109/TED.2018.2834979
[17]	曾庆王, 许会芳. 一种新型双材料双栅的MOSFET器件的性能研究[J]. 安徽理工大学学报(自然科学版), 2021, 41(6):61-66 Zeng Qingwang, Xu Huifang. Research on the performance of a novel dual material double gate MOSFET[J]. Journal of Anhui University of Science and Technology (Natural Science), 2021, 41(6): 61-66
[18]	Yin Longxiang, Du Gang, Liu Xiaoyan. Impact of ambient temperature on the self-heating effects in FinFETs[J]. Journal of Semiconductors, 2018, 39: 094011. doi: 10.1088/1674-4926/39/9/094011
[19]	黄宁, 刘伟景, 李清华, 等. 多栅FinFET性能研究及参数优化[J]. 电子工业专用设备, 2019, 48(5):61-67 Huang Ning, Liu Weijing, Li Qinghua, et al. Research and optimization on multi-gate FinFET[J]. Equipment for Electronic Products Manufacturing, 2019, 48(5): 61-67