Design and simulation of ultrafast four-frame CMOS circuits

Cai Houzhi; Huang Xiaoya; Yang Kaizhi; Ma Youlin; Xie Zhaoyang; Liu Jinyuan; Xiang Lijuan

doi:10.11884/HPLPB202436.240218

Volume 36 Issue 12

Nov. 2024

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Cai Houzhi, Huang Xiaoya, Yang Kaizhi, et al. Design and simulation of ultrafast four-frame CMOS circuits[J]. High Power Laser and Particle Beams, 2024, 36: 122002. doi: 10.11884/HPLPB202436.240218

Citation:

Cai Houzhi, Huang Xiaoya, Yang Kaizhi, et al. Design and simulation of ultrafast four-frame CMOS circuits[J]. High Power Laser and Particle Beams, 2024, 36: 122002. doi: 10.11884/HPLPB202436.240218

Cai Houzhi, Huang Xiaoya, Yang Kaizhi, et al. Design and simulation of ultrafast four-frame CMOS circuits[J]. High Power Laser and Particle Beams, 2024, 36: 122002. doi: 10.11884/HPLPB202436.240218

Citation:

Cai Houzhi, Huang Xiaoya, Yang Kaizhi, et al. Design and simulation of ultrafast four-frame CMOS circuits[J]. High Power Laser and Particle Beams, 2024, 36: 122002. doi: 10.11884/HPLPB202436.240218

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Design and simulation of ultrafast four-frame CMOS circuits

doi: 10.11884/HPLPB202436.240218

College of Physics and Optoelectronic Engineering, Shenzhen University, Key Laboratory of Optoelectronic Devices and Systems of Ministry of Education and Guangdong Province, Shenzhen Key Laboratory of Photonics and Biophotonics, Shenzhen 518060, China

Received Date: 2024-07-01
Accepted Date: 2024-10-29
Rev Recd Date: 2024-10-29

Available Online: 2024-11-06

Publish Date: 2024-11-08

Abstract

Abstract

There are several issues with traditional microchannel plate (MCP) gated framing cameras used for inertial confinement fusion diagnostic, such as large volume, incapable single line-of-sight (SLOS), and so on. The MCP can be instead by a CMOS chips with time resolution of picosecond-scale to achieve the image with SLOS. This paper presents a SLOS four-frame picosecond CMOS circuit consisting of 8×8×4 pixel arrays, and its performance is simulated. The CMOS circuit includes the design of unit pixel which contains four-frame, delay and control circuitry, binary clock tree, circuitry of row and column selector by using 0.18 μm CMOS process and 5T (5 transistors) unit pixel. The signals in the pixel array of the CMOS circuit are analyzed, ans the simulation results show that the CMOS circuit has the capability to obtain four images with a single exposure. The temporal resolution is 100 ps, the interval between two adjacent images is 300 ps, and the uniformity of intra-pixel signals is better than 90%.
- CMOS circuit,
- inertial confinement fusion,
- ultrafast diagnosis,
- framing imaging

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References(29)

References

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