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Guo Haoyi, Cai Zongqi, Huang Qifeng, et al. Research on high power microwave pulse damage threshold of low-noise amplifiers based on automated testing system[J]. High Power Laser and Particle Beams. doi: 10.11884/HPLPB202537.250073
Citation: Guo Haoyi, Cai Zongqi, Huang Qifeng, et al. Research on high power microwave pulse damage threshold of low-noise amplifiers based on automated testing system[J]. High Power Laser and Particle Beams. doi: 10.11884/HPLPB202537.250073

Research on high power microwave pulse damage threshold of low-noise amplifiers based on automated testing system

doi: 10.11884/HPLPB202537.250073
  • Received Date: 2025-04-14
  • Accepted Date: 2025-06-26
  • Rev Recd Date: 2025-07-02
  • Available Online: 2025-07-08
  • High power microwave (HPM) testing is a critical method for investigating the damage effects of semiconductor devices in strong electromagnetic environments. However, traditional testing methods rely primarily on manual operation, making it difficult to accurately determine device failure thresholds and affecting the repeatability and reliability of experiments. To enhance testing accuracy and reduce human error, this study designs an automated HPM pulse testing system and standardized testing procedure based on the damage mechanisms of semiconductor devices. A typical commercial low-noise amplifier (LNA) is selected as the research subject, and its damage threshold under HPM pulses is systematically evaluated. By synchronously measuring the device's time-domain response, frequency characteristics, and current variations, and comparing parameters before and after failure, the failure threshold is precisely identified. Furthermore, a systematic assessment of primary, secondary, and tertiary damage stages of the failed device is conducted, with an analysis of the cumulative damage effects on key device parameters based on microscopic physical mechanisms to reveal the failure mechanisms. The proposed system and evaluation method can be applied to the reliability assessment of semiconductor devices in HPM environments, providing experimental support for device robustness analysis and optimization.
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