高功率高口径效率波导缝隙天线阵列设计

Design of a High-Power and High-Aperture-efficiency slotted waveguide antenna array

  • 摘要: 针对高功率容量、高效率和低剖面阵列天线的应用需求,本文提出了一种集成喇叭腔体和氧化铝陶瓷填充槽的波导缝隙天线单元,该设计通过在传统波导缝隙天线上方增加0.09倍波长的剖面高度,实现了增益与功率容量的协同优化。研究首先推导了传统的波导缝隙天线中缝隙宽度与功率容量的理论关系;设计、加工并测试了传统波导缝隙天线样机,通过反射系数、辐射方向图和增益的测试,验证了仿真与测试结果的一致性,并开展了功率容量测试,测试结果验证了实测结果满足预估值。新型波导缝隙天线在保持与传统波导缝隙天线具有相同口径尺寸的前提下,在每个辐射缝隙上方集成喇叭腔体,并在波导宽边两侧对称布置氧化铝陶瓷填充槽结构。仿真结果表明:该设计使功率容量提升至1.7倍,口径效率由66.7%显著提高至90.7%。基于该单元组成的4单元阵列在没有额外去耦结构情况下,实现了低于−27.1 dB的互耦抑制,在2.458 GHz频点处获得25.64 dBi的峰值增益,对应口径效率达96.1%。

     

    Abstract: To address the application requirements for high power capacity, high efficiency, and low-profile array antennas, this paper proposes a slotted waveguide antenna (SWA) element integrated with horn cavities and alumina ceramic-filled grooves. The theoretical relationship between slot width and power capacity in conventional SWAs is first derived, and a conventional SWA prototype was designed, fabricated, and tested. Measurements of the reflection coefficient, radiation pattern, and gain demonstrated good agreement with simulations, and power capacity tests confirmed that the designed antenna achieves no less than 2 MW, consistent with the value predicted from the derived relationship. The proposed SWA maintains the same aperture size as the conventional design while incorporating a horn cavity above each radiating slot and symmetrically distributed alumina ceramic-filled grooves along both sides of the waveguide’s broad wall, with only a 0.09λ increase in profile height. Simulation results show that the proposed structure increases power capacity by 1.7 times and significantly improves the aperture efficiency (AE) from 66.7% to 90.7%. A 4-element array based on the proposed element achieves mutual coupling (MC) suppression below –27.1 dB without additional decoupling structures, and attains a peak gain of 25.64 dBi at 2.458 GHz, corresponding to an AE of 96.1%. The proposed design thus enables co-optimization of gain, power capacity, and AE, demonstrating strong potential for high-performance low-profile array applications.

     

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