图  1  比较器与时钟驱动器PCB测试板电源模块去耦电路

Figure  1.  Comparator and clock driver PCB test board power module decoupling circuit

图  2  脉冲电流注入实验配置实物示意图

Figure  2.  Schematic diagram of pulse current injection experiment configuration

图  3  注入脉冲电流波形

Figure  3.  Injection pulse current waveform

图  4  工作频率为500 kHz时比较器输出扰动波形

Figure  4.  Output glitch waveforms of a comparator operating at 500 kHz

图  5  工作频率为1 MHz时比较器输出扰动波形

Figure  5.  Output glitch waveforms of a comparator operating at 1 MHz

图  6  工作频率为2 MHz时比较器输出扰动波形

Figure  6.  Output glitch waveforms of a comparator operating at 2 MHz

图  7  工作频率为10 MHz时比较器输出扰动波形

Figure  7.  Output glitch waveform of a comparator operating at 10 MHz

图  8  Δ$ {V}_{1} $与Δ$ {V}_{2} $随注入脉冲电流幅值的变化情况

Figure  8.  Variation of Δ$ {V}_{1} $ and Δ$ {V}_{2} $ with the amplitude of injection pulse current

图  9  不同工作频率下Δ$ {V}_{1} $随注入脉冲电流幅值的变化情况

Figure  9.  Variation of Δ$ {V}_{1} $ with the amplitude of injection pulse current at different operating frequencies

图  10  工作频率为1 GHz时钟驱动器输出扰动波形

Figure  10.  Clock driver output disturbance waveforms with operating frequency 1 GHz

图  11  工作频率1 GHz时钟驱动器输出扰动Δ$ {V}_{1} $随注入电流脉冲幅值变化情况

Figure  11.  Output glitch Δ$ {V}_{1} $ of the 1 GHz clock driver varies with the amplitude of the injection current pulse

图  12  不同工作频率时钟驱动器输出波形扰动幅度Δ$ {V}_{1} $随注入脉冲电流幅值的变化情况

Figure  12.  Glitch amplitude Δ$ {V}_{1} $ of the output waveform of clock drivers with different operating frequencies varies with the amplitude of the injected pulse current

图  13  不同频率下时钟驱动器的输出波形比较

Figure  13.  Comparison of output waveforms of clock drivers at different frequencies