Effect and mechanism of on-chip electrostatic discharge protection circuit under fast rising time electromagnetic pulse
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摘要:
静电放电（ESD）保护电路广泛存在于CMOS数字电路输入与输出端口，耦合进入设备内部的快上升前沿电磁脉冲（FREMP）在与CMOS电路作用的同时，也不排除作用于防护电路。建立了片上CMOS静电放电保护电路模型并且选取方波作为电磁脉冲信号，从多物理参数模型刻画了器件内部的晶格温度，电流密度以及电场强度分布。探讨了在电磁脉冲注入下电路内部器件的变化，并描述了损伤幅度阈值与脉冲宽度之间的关系。结果表明，在FREMP作用下，CMOS电路中的ESD保护电路模块存在潜在的损伤风险，FREMP的注入导致电路内部发生不可恢复的热损失。此外不同属性的脉冲信号会改变电路的损伤阈值。这些结果对一步评估电磁环境对芯片内部的影响提供了重要参考，有助于开展ESD保护电路的可靠性增强研究。
Abstract:The electrostatic discharge (ESD) protection circuit widely exists in the input and output ports of CMOS digital circuits, and fast rising time electromagnetic pulse (FREMP) coupled into the device not only interacts with the CMOS circuit, but also acts on the protection circuit. This paper establishes a model of on-chip CMOS electrostatic discharge protection circuit and selects square pulse as the FREMP signals. Based on multiple physical parameter models, it depicts the distribution of the lattice temperature, current density, and electric field intensity inside the device. At the same time, this paper explores the changes of the internal devices in the circuit under the injection of fast rising time electromagnetic pulse and describes the relationship between the damage amplitude threshold and the pulse width. The results show that the ESD protection circuit has potential damage risk, and the injection of FREMP leads to irreversible heat loss inside the circuit. In addition, pulse signals with different attributes will change the damage threshold of the circuit. These results provide an important reference for further evaluation of the influence of electromagnetic environment on the chip, which is helpful to carry out the reliability enhancement research of ESD protection circuit.
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