Self-triggering square-wave pulse adder with P-channel switches
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摘要: 基于自触发技术提出了一种带截尾功能的方波脉冲叠加器。N型开关与P型开关串联形成特殊的半桥结构，只需要提供一路隔离双极性信号控制第一级的充电和放电开关，所有其它级的开关逐级导通和关断，即又产生高压方波脉冲。该技术不仅大幅简化了脉冲叠加器的驱动电路，还实现了截尾功能，产生快速前后沿的准方波脉冲。并且利用耗尽型N型开关的自动导通特点实现了无需控制的自取电，显著提升驱动电路的绝缘水平。搭建了9级电源样机进行实验验证，实验结果表明：在10 kΩ阻性负载上产生了稳定的重频正极性方波脉冲，电压幅值2.3～3.6 kV可调，脉宽1～10 μs可调，频率0～1 kHz可调，前后沿在100 ns左右，且随着工作电压的升高而加快。10 kΩ和3 nF阻容串联负载下波形仍然是较好的方波脉冲，脉冲前后沿与阻性负载相比没有明显变慢。该脉冲叠加器结构紧凑，有利于实现固态脉冲电源的小型化。Abstract: This paper proposes a square wave pulse adder with truncation function based on the self-triggering technology. The N-type switch and the P-type switch are connected in series to form a special half-bridge structure, which only needs to provide an isolated bipolar signal to control the first-stage charging and discharging switches. All other switches are turned on and off step by step to generate high-voltage square wave pulses. This technology not only greatly simplifies the driving circuit of the pulse adder, but also realizes the truncation function to generate quasi-square wave pulses with fast front and back edges. By using the automatic conduction characteristics of the depleted N-type switch, the self-charging without control is realized, and the insulation level of the drive circuit is significantly improved. A 9-stage power supply prototype is built for experimental verification, and the the experimental results show that a stable repetitive positive square wave pulse is generated on a 10 kΩ resistive load. The voltage amplitude is adjustable from 2.3 kV to 3.6 kV, the pulse width is adjustable from 1 μs to 10 μs, and the frequency is adjustable from 0 kHz to 1 kHz. The front and rear edges are both about 100 ns, and accelerate with the increase of operating voltage. The waveform under 10 kΩ and 3 nF resistance-capacitance series load is still a good square wave pulse, and the front and rear edges of the pulse do not slow down significantly with the resistance load. The compact structure of the pulse adder can help to miniaturize solid-state pulse generators.
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Key words:
- self-triggering driver /
- pulse adder /
- self-powered /
- pulse generator
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图 1 自触发驱动的脉冲叠加器电路原理图
Figure 1. Circuit schematic diagram of self-triggered pulse adder
图 3 自触发驱动导通回路和自触发放电回路
Figure 3. Self-triggering drive conduction circuit and self-triggering discharge circuit
图 12 阻容串联负载下不同电压幅值的输出波形
Figure 12. Output waveform of different voltage amplitudes under a resistor-capacitance series load
表 1 电路参数
Table 1. Circuit parameters
signal
width/μsgate capacitance
Can/nFdriving capacitance
Cbn/pFgate series
resistance/Ωresistance of
load/kΩstorage capacitance
Cn/μF1 3.3n 510 10 10 1 
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