Abstract: With the development of fast switching characteristics of SiC MOSFET devices, they are widely used in circuit systems that require high-speed and flexible high-voltage pulse output. Studies have shown that the on-time of SiC MOSFETs is mainly affected by the gate drive technology and its implementation. Accordingly, related studies have mostly focused on the optimization of its gate drive method. In this study, a SiC MOSFET gate drive circuit was parametrically tested and optimized, and applied to ultra-fast conduction SiC MOSFET devices to achieve a significant reduction in on-time. To verify the optimization effect, the research team designed and prepared an optimized prototype of the gate boost driver for experimental testing. The test data show that the optimized gate drive voltage regulation method effectively improves the device performance, with a pulse voltage rising edge time of up to 27 ns under 10 kV voltage level and 50 A current conditions.