重离子超导直线加速器的新型射频综合保护系统设计

丁鹏程; 高郑; 梁西银; 韩子晨; 薛纵横; 朱正龙; 蒋天才; 曾日华

doi:10.11884/HPLPB202638.250307

重离子超导直线加速器的新型射频综合保护系统设计

doi: 10.11884/HPLPB202638.250307

丁鹏程^{1, 2,},
高郑^2, ,,
梁西银^1, ,,
韩子晨²,
薛纵横²,
朱正龙²,
蒋天才²,
曾日华³

1.
西北师范大学物理与电子工程学院，兰州 730070
2.
中国科学院近代物理研究所，兰州 730000
3.
先进能源科学与技术广东省实验室，广东惠州 516001

基金项目: 国家重大科技基础设施“加速器驱动嬗变研究装置”项目(2017-000052-75-01-000590); 中科院青年创新促进会项目(E329851Y)

详细信息

作者简介:
丁鹏程，2301093455@qq.com

通讯作者:
高　郑，gaozheng@impcas.ac.cn

梁西银，silver@nwnu.edu.cn。

中图分类号: TL53
计量
- 文章访问数: 54
- HTML全文浏览量: 30
- PDF下载量: 16
- 被引次数: 0
出版历程
- 收稿日期: 2025-09-19
- 修回日期: 2026-02-19
- 录用日期: 2026-01-09
- 网络出版日期: 2026-03-27

Design of a New Integrated RF Protection System for Heavy-Ion Superconducting Linear Accelerators

1.
School of Physics and Electronic Engineering, Northwest Normal University, Lanzhou 730070, China
2.
Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou 730000, China
3.
Guangdong Provincial Laboratory of Advanced Energy Science and Technology, Huizhou 5l6001, China

摘要

摘要: 重离子加速装置（HIAF）中的iLinac超导直线加速器需在低温真空环境下长期稳定运行，其运行过程中面临超导腔失超、恒温器氦压与液位异常、真空保护及功率源故障等多重风险。传统FPGA联锁保护方案存在全局协同能力差、接口资源利用率低等问题，而基于PLC的方案响应延迟达毫秒级，无法满足微秒级实时保护需求。为此，提出一种基于ZYNQ SoC的射频综合保护系统，创新采用光纤I/O通信与硬件联锁协同架构，实现多源信号高效聚合与快速处理。该系统充分利用FPGA的并行处理能力，实现了微秒级保护响应，并通过ARM处理器完成系统状态监测与远程管理。实验表明，光纤接口响应时间小于1.78 μs，干触点信号响应时间低于130μs；系统可实时监测关键信号全链路状态，并基于CS-Studio平台实现可视化控制。该设计已成功应用于HIAF超导段，为超导加速器提供了一种高可靠性、低延迟的综合保护新方案。
- 超导腔 /
- 射频系统 /
- ZYNQ SoC /
- 联锁保护 /
- 实时监测
Abstract: Background
The iLinac superconducting linear accelerator in the Heavy Ion Accelerator Facility (HIAF) must operate stably for extended periods in a cryogenic vacuum environment, facing risks such as cavity quenches and helium pressure anomalies. Traditional FPGA or PLC-based protection schemes suffer from poor coordination or millisecond-level delays, resulting in inadequate performance for meeting microsecond-level protection requirements.
Purpose
Design of a radio frequency integrated protection system to address issues such as low coordination efficiency, insufficient resource utilization, and high latency, thereby achieving microsecond-level reliable protection.
Methods
A ZYNQ SoC-based architecture combines FPGA parallel processing (for interlocks) and ARM management. Fiber-optic I/O multiplexes multi-source signals, reducing interface count by 75%. Reliability is assessed via MTBF/MTTR analysis.
Results
Experiments indicate that the response time of the fiber-optic interface is less than 1.78 μs, and that of dry-contact signals is below 130 μs. The system enables real-time monitoring of the full-link status of critical signals and provides visual control based on the CS-Studio platform. It has been successfully deployed in the HIAF iLinac superconducting segment and is operating stably.
Conclusions
The system provides microsecond response, high reliability, and centralized monitoring, offering a reusable solution for superconducting accelerator protection.
- superconducting cavity /
- RF system /
- ZYNQ SoC /
- interlock protection /
- real-time monitoring.

HTML全文

图 1 HIAF总体图

Figure 1. HIAF general layout

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图 2 HIAF iLinac 射频系统架构图

Figure 2. HIAF iLinac RF system architecture

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图 3 射频综合保护系统方案框图

Figure 3. RF integrated protection system block diagram

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图 4 UART通信帧格式

Figure 4. UART communication frame format

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图 5 联锁保护接收端映射关系

Figure 5. Interlock protection receiver end mapping relationship

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图 6 联锁保护模块RTL电路图

Figure 6. Interlock protection module RTL circuit diagram

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图 7 光纤和干接点故障响应时间测试电路图

Figure 7. Fiber and dry contact fault response time test circuit diagram

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图 8 光纤与干接点系统响应时间测试结果

Figure 8. Fiber optic and dry contact systems response time test results

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图 9 真空计真空度（Pa）16小时数据记录图

Figure 9. Vacuum gauge vacuum level (Pa) - 16-hour continuous recording plot

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图 10 耦合器温度（℃）20小时数据记录图

Figure 10. Coupler temperature (℃) - 20-hour continuous recording plot

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表 1 国内外大科学装置联锁保护系统的实现方案

Table 1. Implementation approaches for interlock protection systems in domestic and international large-scale scientific facilities

facilities	solution	system response time/μs
interlock protection system for Shanghai soft X-ray free-electron laser facility	PLC + EPICS	15,000
HIAF-Bring power prototype module fault interlock system	PLC + FPGA	136
the beam interlock system for the LHC	FPGA	89
Shanghai synchrotron radiation facility interlock protection system	FPGA + ARM	34
the machine protecyion system for ESS	FPGA	10

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表 2 信号传输模型与接口策略

Table 2. Signal transmission model and interface strategy

signal type	representative source	transmission model	core advantage
high-speed discrete	ARC system	fiber optic parallel direct sampling	minimal delay, shortest path
medium-speed status	power source / cryogenic vacuum system	fiber optic serial communication	interface multiplexing, low complexity
high-precision analog	coupler temperature	LTC2983 + SPI bus	high precision, noise immunity
high-reliability switch	vacuum gauge	dry contact relay	electrical isolation, highest reliability

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表 3 组件失效率推算汇总

Table 3. Summary of component failure rate prediction

component	single unit failure rate /(×10⁻⁷h)	quantity	total failure rate /(×10⁻⁷h)	remarks & basis
ZYNQ-7045 SoC	1	1	1	industrial-grade standard
fiber optic module	0.5	21	10.5	standard value
LTC2983	2	1	2	standard value, independent of channel count
dry contact relay	1.5	12	18	standard for electromechanical components
DC/DC power module	12	1	12	manufacturer's standard data
PCB & solder joints	3	1	3	system-level failure rate, based on process complexity
system total	—	—	46.5	λ = Σ λi

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