Influence of output voltage rise rate of Si drift step recovery diode on the turn-on characteristics of reverse blocking diode thyristor
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摘要: 针对脉冲功率系统中反向阻断双端固态闸流管(RBDT)采用漂移阶跃恢复二极管(DSRD)触发时对触发波形参数的设计需求,本文围绕硅基漂移阶跃恢复二极管(Si DSRD)的输出电压上升率(dv/dt)开展研究。首先基于TCAD器件仿真与等效电路模型,构建Si DSRD触发RBDT的数值分析模型,对不同dv/dt条件下RBDT的开通延迟时间、电流上升时间以及峰值电流进行了系统对比。随后搭建Si DSRD 触发实验电路,通过改变触发电路参数获得不同的DSRD输出dv/dt,并对RBDT的动态开通特性进行测量。结果表明,在给定电路参数下,随着DSRD输出dv/dt的提高,RBDT的开通延迟时间和电流上升时间缩短,峰值电流略有增加;当dv/dt提升到一定范围后,上述改善趋于减弱并逐渐趋于饱和。仿真与实验结果一致,表明Si DSRD输出波形的电压上升率对RBDT触发过程具有显著影响。该研究为脉冲功率开关应用中Si DSRD触发条件的合理选取提供了工程参考。Abstract:
Background Reverse blocking diode thyristors (RBDTs) are attractive solid-state switches for pulsed power systems because of their high blocking capability and high di/dt turn-on potential. In practical DSRD-triggered operation, the rising-edge voltage slew rate (dv/dt) of the trigger pulse is a key waveform parameter that can alter the initial carrier injection and regenerative turn-on process, and therefore affects the switching transient and current build-up.Purpose This work aims to quantify how the output dv/dt of a silicon-based drift step recovery diode (Si DSRD) influences the turn-on characteristics of an RBDT, and to identify the dv/dt range where further increase brings diminishing improvement under a fixed pulsed power circuit configuration.Methods A numerical analysis model of an Si DSRD-triggered RBDT was established by combining TCAD device simulation with an equivalent external circuit. In the simulations, the trigger pulse parameters other than the rising-edge dv/dt were kept constant to isolate the dv/dt effect, and the RBDT turn-on delay time, current rise time, and peak current were evaluated for multiple dv/dt conditions. An Si DSRD-based trigger circuit was then built for experimental verification. Different dv/dt levels were obtained by adjusting trigger-circuit parameters (including the pulse transformer core and turns as well as the shaping capacitor), and the trigger voltage across the RBDT and the corresponding current waveforms were measured to extract the same turn-on metrics.Results Both simulation and experiment show that increasing the Si DSRD output dv/dt shortens the RBDT turn-on delay time and current rise time, while the peak current exhibits a slight increase under the tested circuit parameters. When dv/dt is raised beyond a certain range, the reductions in delay and rise time become progressively smaller and tend to saturate, indicating diminishing sensitivity of the turn-on transient to further dv/dt enhancement. The overall trends obtained from TCAD and measurements are consistent across the investigated dv/dt range.Conclusions The voltage rise rate of the Si DSRD trigger waveform is an effective control parameter for tailoring the RBDT turn-on transient, mainly reflected in reduced delay and faster current build-up, with a saturation tendency at higher dv/dt. The reported TCAD–experiment comparison provides a practical basis for selecting dv/dt levels and designing Si DSRD-based trigger conditions for RBDT switching in pulsed power applications.-
Key words:
- Si DSRD /
- RBDT /
- voltage rise rate dv/dt /
- turn-on delay time /
- current rise time /
- pulsed power trigger circuit
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表 1 Si DSRD 在铁氧体与铁剂纳米晶磁芯下不同电容 C2 与匝数 N 的输出特性
Table 1. Output characteristics of Si DSRD with different C2 capacitances and turns N using a ferrite and Fe-based nanocrystalline core
turns N capacitance C2/nF output dv/dt (V/ns) peak voltage/kV Ferrite core Fe-based nanocrystalline core Ferrite core Fe-based nanocrystalline core 2 2.2 107 49 1.86 1.09 8.8 252 55 3.54 1.18 18.8 216 126 3.42 2.94 28.8 199 120 4.18 3.18 5 2.2 415 60 4.46 1.06 8.8 323 137 4.5 3.18 18.8 259 116 3.62 2.74 28.8 198 96 2.34 2.3 10 2.2 145 73 3.9 2.18 8.8 28 91 2.4 2.3 18.8 / / / / 28.8 / / / / -
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